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EUROMICRO
1998
IEEE
15 years 4 months ago
Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems
The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa...
107
Voted
DSD
2009
IEEE
126views Hardware» more  DSD 2009»
15 years 4 months ago
Architecture-Driven Synthesis of Reconfigurable Cells
In this paper, we present a novel method for merging sets of computational patterns into a reconfigurable cell respecting design constraints and optimizing specific design aspects...
Christophe Wolinski, Krzysztof Kuchcinski, Erwan R...
GECCO
2000
Springer
150views Optimization» more  GECCO 2000»
15 years 4 months ago
Automatic Synthesis of Electrical Circuits Containing a Free Variable Using Genetic Programming
A mathematical formula containing one or more free variables is "general" in the sense that it represents the solution to all instances of a problem (instead of just the...
John R. Koza, Martin A. Keane, Jessen Yu, William ...
DAC
2003
ACM
16 years 1 months ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
15 years 2 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang