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SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
15 years 5 months ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa
CODES
2007
IEEE
15 years 6 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
84
Voted
DATE
2005
IEEE
97views Hardware» more  DATE 2005»
15 years 6 months ago
Synchronization Processor Synthesis for Latency Insensitive Systems
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
Pierre Bomel, Eric Martin, Emmanuel Boutillon
ICRA
2003
IEEE
147views Robotics» more  ICRA 2003»
15 years 5 months ago
Synthesis of walking primitive databases for biped robots in 3D-environments
Abstract—This paper presents a systematic approach to generate walking primitive databases for anthropomorphic 3D–bipeds allowing step length adaptation, direction changes and ...
Joachim Denk, Günther Schmidt
110
Voted
FSEN
2009
Springer
15 years 4 months ago
Verification, Performance Analysis and Controller Synthesis for Real-Time Systems
This note aims at providing a concise and precise Travellers Guide, Phrase Book or Reference Manual to the timed automata modeling formalism introduced by Alur and Dill [7, 8]. The...
Uli Fahrenberg, Kim G. Larsen, Claus R. Thrane