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114
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DAC
2002
ACM
16 years 1 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton
85
Voted
DAC
2005
ACM
16 years 1 months ago
Temperature-aware resource allocation and binding in high-level synthesis
Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process technologies. This trend will only strengthen with futu...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
104
Voted
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
15 years 9 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
105
Voted
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
15 years 9 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
ICCAD
2005
IEEE
168views Hardware» more  ICCAD 2005»
15 years 9 months ago
Statistical timing analysis driven post-silicon-tunable clock-tree synthesis
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
Jeng-Liang Tsai, Lizheng Zhang