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88
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ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
15 years 2 months ago
A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
Wei-Sheng Huang, Yu-Ru Hong, Juinn-Dar Huang, Ya-S...
121
Voted
ERSA
2004
129views Hardware» more  ERSA 2004»
15 years 2 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
96
Voted
ICIP
2010
IEEE
14 years 10 months ago
Stochastic gradient descent for robust inverse photomask synthesis in optical lithography
Optical lithography is a critical step in the semiconductor manufacturing process, and one key problem is the design of the photomask for a particular circuit pattern, given the o...
Ningning Jia, Edmund Y. Lam
FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
14 years 4 months ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...
93
Voted
PLDI
2012
ACM
13 years 3 months ago
Concurrent data representation synthesis
We describe an approach for synthesizing data representations for concurrent programs. Our compiler takes as input a program written using concurrent relations and synthesizes a r...
Peter Hawkins, Alex Aiken, Kathleen Fisher, Martin...