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» Optimizing the Evaluation of XPath Using Description Logics
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FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
15 years 3 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
IEEESCC
2005
IEEE
15 years 3 months ago
Web Service Discovery Based on Behavior Signatures
Web service discovery is a key problem as the number of services is expected to increase dramatically. Service discovery at the present time is based primarily on keywords, or int...
Zhongnan Shen, Jianwen Su
DATE
1997
IEEE
75views Hardware» more  DATE 1997»
15 years 1 months ago
Using constraint logic programming in memory synthesis for general purpose computers
In modern computer systems the performance is dominated by the memory performance. Currently, there is neither a systematic design methodology nor a tool for the design of memory ...
Renate Beckmann, Jürgen Herrmann
INFOCOM
2002
IEEE
15 years 2 months ago
On Multiple Description Streaming with Content Delivery Networks
Abstract— CDNs have been widely used to provide low latency, scalability, fault tolerance, and load balancing for the delivery of web content and more recently streaming media. W...
John G. Apostolopoulos, Tina Wong, Susie J. Wee, D...
DAC
2002
ACM
15 years 10 months ago
IP delivery for FPGAs using Applets and JHDL
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
Michael J. Wirthlin, Brian McMurtrey