1990 search results - page 113 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
162
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EDCC
2006
Springer
15 years 8 months ago
2006
Springer
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
131
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ISCA
2002
IEEE
15 years 9 months ago
2002
IEEE
Microprocessor clock frequency has improved by nearly 40% annually over the past decade. This improvement has been provided, in equal measure, by smaller technologies and deeper p...
153
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VLSID
2008
IEEE
16 years 4 months ago
2008
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
124
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IWNAS
2008
IEEE
15 years 10 months ago
2008
IEEE
Multi-core processors based SMP servers have become building blocks for Linux clusters in recent years because they can deliver better performance for multi-threaded programs thro...
123
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ISCA
2005
IEEE
15 years 9 months ago
2005
IEEE
To maintain coherence in conventional shared-memory multiprocessor systems, processors first check other processors’ caches before obtaining data from memory. This coherence che...