1990 search results - page 156 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
132
click to vote
LCTRTS
2010
Springer
15 years 11 months ago
2010
Springer
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
125
click to vote
DAGM
2003
Springer
15 years 9 months ago
2003
Springer
In this paper, we present a real-time PCB inspection system which can detect defects including the breaks in the wires and short circuit. The proposed inspection algorithm is based...
139
click to vote
CODES
2004
IEEE
15 years 8 months ago
2004
IEEE
We present a CPU scheduling algorithm, called Energy-efficient Utility Accrual Algorithm (or EUA), for battery-powered, embedded real-time systems. We consider an embedded softwar...
124
click to vote
OSDI
1994
ACM
15 years 5 months ago
1994
ACM
Parallel processing has been proposed as a means of improving network protocol throughput. Several different strategies have been taken towards parallelizing protocols. A relative...
133
click to vote
DAC
1995
ACM
15 years 8 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...