1990 search results - page 167 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
121
Voted
ISCA
1996
IEEE
15 years 8 months ago
1996
IEEE
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
139
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USENIX
2003
15 years 6 months ago
2003
Read-copy update (RCU) allows lock-free read-only access to data structures that are concurrently modified on SMP systems. Despite the concurrent modifications, read-only access...
216
Voted
SIGMOD
2009
ACM
16 years 4 months ago
2009
ACM
Synchronous transactional logging is the central mechanism for ensuring data persistency and recoverability in database systems. Unfortunately, magnetic disks are ill-suited for t...
156
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CASES
2006
ACM
15 years 10 months ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
133
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MICRO
2002
IEEE
15 years 9 months ago
2002
IEEE
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...