1990 search results - page 184 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
173
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VLSID
2007
IEEE
16 years 5 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
127
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ISDA
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper proposes a novel adaptive representation for evolutionary multiobjective optimization for solving a stock modeling problem. The standard Pareto Achieved Evolution Strat...
150
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KBSE
2003
IEEE
15 years 10 months ago
2003
IEEE
Modern architectures, such as the Intel Itanium, support speculation, a hardware mechanism that allows the early execution of expensive operations—possibly even before it is kno...
136
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USENIX
2004
15 years 6 months ago
2004
Multihoming is increasingly being employed by large enterprises and data centers as a mechanism to extract good performance from their provider connections. Today, multihomed end-...
142
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USENIX
1994
15 years 6 months ago
1994
y-filled data block results in a delayed write,Abstract while a modification that fills a block results in an immediate, although asynchronous, write. TheSome file systems can dela...