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SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
15 years 4 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
LCPC
2009
Springer
15 years 9 months ago
Speculative Optimizations for Parallel Programs on Multicores
The advent of multicores presents a promising opportunity for exploiting fine grained parallelism present in programs. Programs parallelized in the above fashion, typically involv...
Vijay Nagarajan, Rajiv Gupta
WIESS
2000
15 years 6 months ago
Stub-Code Performance Is Becoming Important
As IPC mechanisms become faster, stub-code efficiency becomes a performance issue for local client/server RPCs and inter-component communication. Inefficient and unnecessary compl...
Andreas Haeberlen, Jochen Liedtke, Yoonho Park, La...
154
Voted
PDP
2010
IEEE
15 years 9 months ago
hwloc: A Generic Framework for Managing Hardware Affinities in HPC Applications
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...
François Broquedis, Jérôme Cle...
ICRA
2010
IEEE
128views Robotics» more  ICRA 2010»
15 years 3 months ago
On optimal AUV track-spacing for underwater mine detection
— This work addresses the task of designing the optimal survey route that an autonomous underwater vehicle (AUV) should take in mine countermeasures (MCM) operations. It is assum...
David P. Williams