1990 search results - page 211 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
127
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ICCD
1994
IEEE
15 years 9 months ago
1994
IEEE
Systems for multi-level logic optimization are usually based on a set of specialized, loosely-related transformations which work on a network representation. The sequence of trans...
119
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DAC
2007
ACM
16 years 6 months ago
2007
ACM
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
131
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ICCD
2006
IEEE
16 years 2 months ago
2006
IEEE
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
146
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MSN
2007
Springer
15 years 11 months ago
2007
Springer
Abstract. Multi-hop wireless networks provide a quick and easy way for networking when we need a temporary network or when cabling is difficult. The 802.11 Medium Access Control (M...
202
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ECRTS
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper presents a general framework for analyzing and designing embedded systems with energy and timing requirements. A set of realistic assumptions is considered in the model...