Sciweavers

1990 search results - page 250 / 398
» Optimizing the Instruction Cache Performance of the Operatin...
Sort
View
ICASSP
2011
IEEE
14 years 8 months ago
Rate control for PSD limited multiple access systems through linear programming
In this paper we discuss rate control for multiuser multicarrier systems, where the transmitter has a single antenna and is subject to a PSD mask limitation while the receiver has...
Amir Leshem, Ephraim Zehavi
DATE
2007
IEEE
174views Hardware» more  DATE 2007»
15 years 11 months ago
ATLAS: a chip-multiprocessor with transactional memory support
Chip-multiprocessors are quickly becoming popular in embedded systems. However, the practical success of CMPs strongly depends on addressing the difficulty of multithreaded appli...
Njuguna Njoroge, Jared Casper, Sewook Wee, Yuriy T...
HPCA
2011
IEEE
14 years 8 months ago
Calvin: Deterministic or not? Free will to choose
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
Derek Hower, Polina Dudnik, Mark D. Hill, David A....
JPDC
2006
112views more  JPDC 2006»
15 years 4 months ago
CEFT: A cost-effective, fault-tolerant parallel virtual file system
The vulnerability of computer nodes due to component failures is a critical issue for cluster-based file systems. This paper studies the development and deployment of mirroring in...
Yifeng Zhu, Hong Jiang
104
Voted
CCE
2006
15 years 4 months ago
Air separation control technology
Achieving high performance process control (HPPC) requires that the control system operate the plant at optimal efficiency over the full range of steady state and dynamic conditio...
David R. Vinson