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121
Voted
ECRTS
2006
IEEE
15 years 3 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
99
Voted
ASPLOS
1992
ACM
15 years 1 months ago
1992
ACM
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
LCTRTS
2005
Springer
15 years 3 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
IEEEINTERACT
2002
IEEE
15 years 2 months ago
2002
IEEE
A dynamic optimizer is a software-based system that performs code modifications at runtime, and several such systems have been proposed over the past several years. These systems ...