1990 search results - page 89 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
125
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WDAG
2007
Springer
15 years 10 months ago
2007
Springer
We study replacement algorithms for non-uniform access caches that are used in distributed storage systems. Considering access latencies as major costs of data management in such a...
152
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CC
2008
Springer
15 years 6 months ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
105
Voted
DSD
2003
IEEE
15 years 9 months ago
2003
IEEE
The Logarithmic Number System (LNS) is an alternative to IEEE-754 standard floating-point arithmetic. LNS multiply, divide and square root are easier than IEEE-754 and naturally ...
145
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ICS
2007
Tsinghua U.
15 years 10 months ago
2007
Tsinghua U.
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
116
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DAC
2004
ACM
16 years 5 months ago
2004
ACM
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...