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» Optimizing the Use of High Performance Software Libraries
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MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 10 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
16 years 1 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
154
Voted
KBSE
1997
IEEE
15 years 8 months ago
Application of Formal Methods to the Development of a Software Maintenance Tool
Partial evaluation is an optimization technique traditionally used in compilation. We have adapted this technique to the understanding of scientic application programs during t...
Sandrine Blazy, Philippe Facon
CVPR
2012
IEEE
13 years 7 months ago
Random walks based multi-image segmentation: Quasiconvexity results and GPU-based solutions
We recast the Cosegmentation problem using Random Walker (RW) segmentation as the core segmentation algorithm, rather than the traditional MRF approach adopted in the literature s...
Maxwell D. Collins, Jia Xu, Leo Grady, Vikas Singh
SIGSOFT
2007
ACM
16 years 5 months ago
CTG: a connectivity trace generator for testing the performance of opportunistic mobile systems
The testing of the performance of opportunistic communication protocols and applications is usually done through simulation as i) deployments are expensive and should be left to t...
Roberta Calegari, Mirco Musolesi, Franco Raimondi,...