Power consumption, particularly runtime leakage, in long on-chip buses has grown to an unacceptable portion of the total power budget due to heavy buffer insertion to combat RC de...
Harmander Deogun, Rajeev R. Rao, Dennis Sylvester,...
The availability of large-scale computing platforms comprised of tens of thousands of multicore processors motivates the need for the next generation of highly scalable sparse line...
Increasing power densities and the high cost of low thermal resistance packages and cooling solutions make it impractical to design processors for worst-case temperature scenarios...
Thidapat Chantem, Xiaobo Sharon Hu, Robert P. Dick
Authors presented recently an indoor location technique based on Time Of Arrival (TOA) obtained from Round-Trip-Time (RTT) measurements at data link level and trilateration. This ...
This paper investigates the performance of a content distribution network designed to provide bounded content access latency. Content can be divided into multiple classes with dif...