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» Optimizing the Use of High Performance Software Libraries
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FPL
2005
Springer
119views Hardware» more  FPL 2005»
15 years 8 months ago
Real-Time Feature Extraction for High Speed Networks
With the onset of Gigabit networks, current generation networking components will soon be insufficient for numerous reasons: most notably because existing methods cannot support h...
David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Al...
125
Voted
EUROSYS
2007
ACM
16 years 11 days ago
Comparing the performance of web server architectures
In this paper, we extensively tune and then compare the performance of web servers based on three different server architectures. The µserver utilizes an event-driven architectur...
David Pariag, Tim Brecht, Ashif S. Harji, Peter A....
ARVLSI
2001
IEEE
289views VLSI» more  ARVLSI 2001»
15 years 7 months ago
A High-Performance 64-bit Adder Implemented in Output Prediction Logic
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
Sheng Sun, Larry McMurchie, Carl Sechen
143
Voted
HIPC
2000
Springer
15 years 6 months ago
Meta-data Management System for High-Performance Large-Scale Scientific Data Access
Many scientific applications manipulate large amount of data and, therefore, are parallelized on high-performance computing systems to take advantage of their computational power a...
Wei-keng Liao, Xiaohui Shen, Alok N. Choudhary
115
Voted
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
15 years 9 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk