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FPL
2003
Springer
81views Hardware» more  FPL 2003»
15 years 4 months ago
Software Decelerators
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
Eric Keller, Gordon J. Brebner, Philip James-Roxby
123
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AINA
2006
IEEE
15 years 5 months ago
A Hybrid Rule-Based/Case-Based Reasoning Approach for Service Fault Diagnosis
— In today’s service market the provisioning of high quality services has become a critical issue for providers as the business success of their customers is often based on the...
Andreas Hanemann
CHI
2005
ACM
16 years 1 days ago
Profile before optimizing: a cognitive metrics approach to workload analysis
The Intelligence Analyst (IA) community will soon be the designated users of many new software tools. In the multitasking world of the IA, any one tool cannot be permitted to gree...
Wayne D. Gray, Michael J. Schoelles, Christopher W...
IISWC
2008
IEEE
15 years 6 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
QEST
2010
IEEE
14 years 9 months ago
On the Theory of Stochastic Processors
Traditional architecture design approaches hide hardware uncertainties from the software stack through overdesign, which is often expensive in terms of power consumption. The recen...
Parasara Sridhar Duggirala, Sayan Mitra, Rakesh Ku...