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CGO
2005
IEEE
15 years 4 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
PAMI
2008
155views more  PAMI 2008»
14 years 10 months ago
Subclass Problem-Dependent Design for Error-Correcting Output Codes
A common way to model multiclass classification problems is by means of Error-Correcting Output Codes (ECOCs). Given a multiclass problem, the ECOC technique designs a code word fo...
Sergio Escalera, David M. J. Tax, Oriol Pujol, Pet...
BMCBI
2005
125views more  BMCBI 2005»
14 years 10 months ago
Multiple sequence alignments of partially coding nucleic acid sequences
Background: High quality sequence alignments of RNA and DNA sequences are an important prerequisite for the comparative analysis of genomic sequence data. Nucleic acid sequences, ...
Roman R. Stocsits, Ivo L. Hofacker, Claudia Fried,...
ENTCS
2002
181views more  ENTCS 2002»
14 years 10 months ago
Alias verification for Fortran code optimization
Abstract: Alias analysis for Fortran is less complicated than for programming languages with pointers but many real Fortran programs violate the standard: a formal parameter or a c...
Thi Viet Nga Nguyen, François Irigoin
83
Voted
SIGMETRICS
2008
ACM
113views Hardware» more  SIGMETRICS 2008»
14 years 10 months ago
Layered interval codes for tcam-based classification
Ternary content-addressable memories (TCAMs) are increasingly used for high-speed packet classification. TCAMs compare packet headers against all rules in a classification database...
Anat Bremler-Barr, David Hay, Danny Hendler, Boris...