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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
15 years 4 months ago
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation
— The fully parallel LDPC decoding architecture can achieve high decoding throughput, but it suffers from large hardware complexity caused by a large set of processing units and ...
In-Cheol Park, Se-Hyeon Kang
VLDB
2005
ACM
122views Database» more  VLDB 2005»
15 years 4 months ago
C-Store: A Column-oriented DBMS
This paper presents the design of a read-optimized relational DBMS that contrasts sharply with most current systems, which are write-optimized. Among the many differences in its d...
Michael Stonebraker, Daniel J. Abadi, Adam Batkin,...
ISCIS
2003
Springer
15 years 3 months ago
Improved POCS-Based De-blocking Algorithm for Block-Transform Compressed Images
This paper presents a postprocessing technique based on the theory of projections onto convex sets (POCS) to reduce the blocking artifacts in low bit rate BDCT-coded images. In the...
Yoon Kim, Chun-Su Park, Kyunghun Jang, Sung-Jea Ko
OOPSLA
1999
Springer
15 years 3 months ago
Reducing Transfer Delay Using Java Class File Splitting and Prefetching
The proliferation of the Internet is fueling the development of mobile computing environments in which mobile code is executed on remote sites. In such environments, the end user ...
Chandra Krintz, Brad Calder, Urs Hölzle
ISPD
1997
ACM
106views Hardware» more  ISPD 1997»
15 years 2 months ago
VLSI/PCB placement with obstacles based on sequence-pair
In a typical VLSI/PCB design, some modules are pre-placed in advance, and the other modules are requested to be placed without overlap with these pre-placed modules. The presence ...
Hiroshi Murata, Kunihiro Fujiyoshi, Mineo Kaneko