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PDP
2010
IEEE
15 years 6 months ago
Impact of Parallel Workloads on NoC Architecture Design
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
Henrique Cota de Freitas, Lucas Mello Schnorr, Mar...
DATE
2010
IEEE
165views Hardware» more  DATE 2010»
15 years 5 months ago
Multicore soft error rate stabilization using adaptive dual modular redundancy
— The use of dynamic voltage and frequency scaling (DVFS) in contemporary multicores provides significant protection from unpredictable thermal events. A side effect of DVFS can ...
Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson...
WOTUG
2007
15 years 1 months ago
C++CSP2: A Many-to-Many Threading Model for Multicore Architectures
Abstract. The advent of mass-market multicore processors provides exciting new opportunities for parallelism on the desktop. The original C++CSP – a library providing concurrency...
Neil Brown
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
15 years 6 months ago
Copy or Discard execution model for speculative parallelization on multicores
The advent of multicores presents a promising opportunity for speeding up sequential programs via profile-based speculative parallelization of these programs. In this paper we pr...
Chen Tian, Min Feng, Vijay Nagarajan, Rajiv Gupta
IEEEPACT
2006
IEEE
15 years 5 months ago
Core architecture optimization for heterogeneous chip multiprocessors
Previous studies have demonstrated the advantages of single-ISA heterogeneous multi-core architectures for power and performance. However, none of those studies examined how to de...
Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi