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IEEEPACT
2008
IEEE
15 years 6 months ago
Mars: a MapReduce framework on graphics processors
We design and implement Mars, a MapReduce framework, on graphics processors (GPUs). MapReduce is a distributed programming framework originally proposed by Google for the ease of ...
Bingsheng He, Wenbin Fang, Qiong Luo, Naga K. Govi...
ICMCS
2007
IEEE
159views Multimedia» more  ICMCS 2007»
15 years 6 months ago
Accelerating Mutual-Information-Based Linear Registration on the Cell Broadband Engine Processor
Emerging multi-core processors are able to accelerate medical imaging applications by exploiting the parallelism available in their algorithms. We have implemented a mutual-inform...
Moriyoshi Ohara, Hangu Yeo, Frank Savino, Giridhar...
ICMCS
2006
IEEE
146views Multimedia» more  ICMCS 2006»
15 years 6 months ago
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications
Numerous approaches can be employed in exploiting computation power in processors such as superscalar, VLIW, SMT and multi-core on chip. In this paper, a UniCore VisoMT processor ...
Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-He...
ICMCS
2007
IEEE
117views Multimedia» more  ICMCS 2007»
15 years 6 months ago
Digital Media Indexing on the Cell Processor
We present a case study of developing a digital media indexing application, code-named MARVEL, on the STI Cell Broadband Engine (CBE) processor. There are two aspects of the targe...
Lurng-Kuo Liu, Qiang Liu, Apostol Natsev, Kenneth ...
SBACPAD
2008
IEEE
126views Hardware» more  SBACPAD 2008»
15 years 6 months ago
A Software Transactional Memory System for an Asymmetric Processor Architecture
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
Felipe Goldstein, Alexandro Baldassin, Paulo Cento...