—A serial sum-product architecture for low-density parity-check (LDPC) codes is presented. In the proposed architecture, a standard bit node processing unit computes the bit to c...
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...
— In this paper, a family of low-density parity-check (LDPC) degree distributions, whose decoding threshold on the binary erasure channel (BEC) admits a simple closed form, is pr...
We describe and analyze sparse graphical code constructions for the problems of source coding with decoder side information (the Wyner-Ziv problem), and channel coding with encoder...
Abstract--We present a pilotless frame synchronization approach that exploits feedback from a low-density parity-check (LDPC) code decoder. The synchronizer is based on syndrome ch...
Dong-U Lee, Hyungjin Kim, Christopher R. Jones, Jo...
We propose a simple pulse-amplitude modulation (PAM)-based coded modulation scheme that overcomes two major constraints of power line channels, viz., severe insertion-loss and impu...