339 search results - page 13 / 68 » Overview on Low Power SoC Design Technology |
ISLPED
2009
ACM
15 years 4 months ago
2009
ACM
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
58
Voted
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...
ISLPED
2000
ACM
15 years 2 months ago
2000
ACM
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
ASPDAC
2011
ACM
14 years 1 months ago
2011
ACM
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
63
Voted
ISCAS
2007
IEEE
15 years 4 months ago
2007
IEEE
— Design and analysis guidelines for resonant interconnect networks are presented in this paper. The methodology focuses on developing an accurate analytic distributed model of t...