339 search results - page 14 / 68 » Overview on Low Power SoC Design Technology |
114
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JSA
2010
14 years 6 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
ICCD
2001
IEEE
15 years 8 months ago
2001
IEEE
Lowering power consumption in microprocessors, whether used in portables or not, has now become one of the most critical design concerns. On-chip cache memories tend to occupy dom...
117
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ISCAS
2005
IEEE
15 years 5 months ago
2005
IEEE
Abstract— Binary Symmetric Channels (BSC) like the Interchip buses and the Intra-chip buses are gaining a lot of attention due to their widespread use with multimedia storage dev...
FTEDA
2008
14 years 12 months ago
2008
With greater integration, the power dissipation in integrated circuits has begun to outpace the ability of today's heat sinks to limit the on-chip temperature. As a result, t...
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
- Each year tens of billions of Dollars are wasted by the microelectronics industry because of missed deadlines and delayed design projects. These delays are partially due to desig...