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IPPS
2005
IEEE
15 years 3 months ago
Programming Configurable Multiprocessors
A new high performance computation technique involving multiple processors on a single silicon die is quickly gaining popularity. This new design approach provides very high perfo...
Steven A. Guccione
ERSA
2007
86views Hardware» more  ERSA 2007»
14 years 11 months ago
High-Precision BLAS on FPGA-enhanced Computers
The emergence of high-density reconfigurable hardware devices gives scientists and engineers an option to accelerating their numerical computing applications on low-cost but power...
Chuan He, Guan Qin, Richard E. Ewing, Wei Zhao
CHI
2009
ACM
15 years 10 months ago
Ephemeral adaptation: the use of gradual onset to improve menu selection performance
We introduce ephemeral adaptation, a new adaptive GUI technique that improves performance by reducing visual search time while maintaining spatial consistency. Ephemeral adaptive ...
Leah Findlater, Karyn Moffatt, Joanna McGrenere, J...
FCCM
2007
IEEE
165views VLSI» more  FCCM 2007»
14 years 11 months ago
Sparse Matrix-Vector Multiplication Design on FPGAs
Creating a high throughput sparse matrix vector multiplication (SpMxV) implementation depends on a balanced system design. In this paper, we introduce the innovative SpMxV Solver ...
Junqing Sun, Gregory D. Peterson, Olaf O. Storaasl...
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
14 years 9 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek