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ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 1 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
15 years 6 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
86
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SBCCI
2004
ACM
111views VLSI» more  SBCCI 2004»
15 years 3 months ago
A partial reconfigurable architecture for controllers based on Petri nets
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
Paulo Sérgio B. do Nascimento, Paulo Romero...
SI3D
1995
ACM
15 years 1 months ago
The Sort-First Rendering Architecture for High-Performance Graphics
Interactive graphics applications have long been challenging graphics system designers by demanding machines that can provide ever increasing polygon rendering performance. Anothe...
Carl Mueller
BMCBI
2008
214views more  BMCBI 2008»
14 years 9 months ago
Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
Yoginder S. Dandass, Shane C. Burgess, Mark Lawren...