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FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 10 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
ICPP
2003
IEEE
15 years 10 months ago
A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
Xiaotong Zhuang, Hsien-Hsin S. Lee
JVCIR
2008
92views more  JVCIR 2008»
15 years 4 months ago
Hardware implementation of a disparity estimation scheme for real-time compression in 3D imaging applications
This paper presents a novel hardware implementation of a disparity estimation scheme targeted to real-time Integral Photography (IP) image and video sequence compression. The soft...
Dionisis Chaikalis, Nikos Sgouros, Dimitris Maroul...
CASES
2003
ACM
15 years 10 months ago
Frequent loop detection using efficient non-intrusive on-chip hardware
Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting ...
Ann Gordon-Ross, Frank Vahid
EUROSYS
2007
ACM
15 years 6 months ago
Enabling scalability and performance in a large scale CMP environment
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...