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IPPS
2000
IEEE
15 years 4 months ago
On the Scheduling Algorithm of the Dynamically Trace Scheduled VLIW Architecture
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
Alberto Ferreira de Souza, Peter Rounce
MICRO
2005
IEEE
123views Hardware» more  MICRO 2005»
15 years 5 months ago
A Criticality Analysis of Clustering in Superscalar Processors
Clustered machines partition hardware resources to circumvent the cycle time penalties incurred by large, monolithic structures. This partitioning introduces a long inter-cluster ...
Pierre Salverda, Craig B. Zilles
DAC
1998
ACM
16 years 24 days ago
Design Reliability - Estimation through Statistical Analysis of Bug Discovery Data
Statistical analysis of bug discovery data is used in the software industry to check the quality of the testing process and estimate the reliability of the tested program. In this...
Yossi Malka, Avi Ziv
FCCM
2005
IEEE
96views VLSI» more  FCCM 2005»
15 years 5 months ago
Preliminary Report: FPGA Acceleration of Molecular Dynamics Computations
Abstract: Molecular Dynamics (MD) is of central importance to computational chemistry and its myriad applications. Here we show that, at even a preliminary stage of development, MD...
Yongfeng Gu, Tom Van Court, Douglas DiSabello, Mar...
FPL
2005
Springer
144views Hardware» more  FPL 2005»
15 years 5 months ago
Accelerating Molecular Dynamics Simulations With Configurable Circuits
Molecular Dynamics (MD) is of central importance to computational chemistry. Here we show that MD can be implemented efficiently on a COTS FPGA board, and that speedups from ¿½...
Yongfeng Gu, Tom Van Court, Martin C. Herbordt