339 search results - page 37 / 68 » PC Desktop Performance and Hardware Performance Counters |
ISCA
1999
IEEE
15 years 4 months ago
1999
IEEE
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
MICRO
2010
IEEE
14 years 9 months ago
2010
IEEE
Bias temperature instability, hot-carrier injection, and gate-oxide wearout will cause severe lifetime degradation in the performance and the reliability of future CMOS devices. Th...
ICCS
2004
Springer
15 years 5 months ago
2004
Springer
A cache oblivious matrix transposition algorithm is implemented and analyzed using simulation and hardware performance counters. Contrary to its name, the cache oblivious matrix tr...
ICCS
2004
Springer
15 years 5 months ago
2004
Springer
In this paper, two tools are presented: an execution driven cache simulator which relates event metrics to a dynamically built-up call-graph, and a graphical front end able to visu...
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DFT
2003
IEEE
15 years 5 months ago
2003
IEEE
Transient faults in VLSI circuits could lead to disastrous consequences. With technology scaling, circuits are becoming increasingly vulnerable to transient faults. This papers pr...