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SIGOPS
2010
179views more  SIGOPS 2010»
14 years 5 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
TASLP
2010
138views more  TASLP 2010»
14 years 5 months ago
Glimpsing IVA: A Framework for Overcomplete/Complete/Undercomplete Convolutive Source Separation
Abstract--Independent vector analysis (IVA) is a method for separating convolutedly mixed signals that significantly reduces the occurrence of the well-known permutation problem in...
Alireza Masnadi-Shirazi, Wenyi Zhang, Bhaskar D. R...
TC
2010
14 years 5 months ago
Model-Driven System Capacity Planning under Workload Burstiness
In this paper, we define and study a new class of capacity planning models called MAP queueing networks. MAP queueing networks provide the first analytical methodology to describe ...
Giuliano Casale, Ningfang Mi, Evgenia Smirni
TC
2010
14 years 5 months ago
Reconfigurable Hardware Implementations of Tweakable Enciphering Schemes
Tweakable enciphering schemes are length preserving block cipher modes of operation that provide a strong pseudo-random permutation. It has been suggested that these schemes can b...
Cuauhtemoc Mancillas-López, Debrup Chakrabo...
TCAD
2010
160views more  TCAD 2010»
14 years 5 months ago
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient netwo...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
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