In this paper, we compare the underlying models of computation of the system description languages SystemC and Esterel. Although these languages have a rather different origin, we...
We describe a general approach for defining new temporal specification languages, and adopting existing languages, for SystemC. We define the concept of "underlying trace"...
Deian Tabakov, Gila Kamhi, Moshe Y. Vardi, Eli Sin...
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
Marcello Coppola, Stephane Curaba, Miltos D. Gramm...
In today’s flows, there is still a gap between system level description and hardware implementation, especially for analog/RF building blocks. SystemC-AMS or co-simulations have...
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...