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» POSIX modeling in SystemC
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FDL
2006
IEEE
15 years 6 months ago
Formalizing TLM with Communicating State Machines
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...
Bernhard Niemann, Christian Haubelt
140
Voted
DATE
2009
IEEE
249views Hardware» more  DATE 2009»
15 years 7 months ago
White box performance analysis considering static non-preemptive software scheduling
—In this paper, a novel approach for integrating static non-preemptive software scheduling in formal bottom-up performance evaluation of embedded system models is described. The ...
Alexander Viehl, Michael Pressler, Oliver Bringman...
IFIP
2010
Springer
14 years 7 months ago
A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement
Abstract. In this article, we present a flexible simulation environment for embedded real-time software refinement by a mixed level cosimulation. For this, ne the native speed of a...
Markus Becker, Henning Zabel, Wolfgang Müller...
124
Voted
DAC
2010
ACM
14 years 11 months ago
SCEMIT: a systemc error and mutation injection tool
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...
Peter Lisherness, Kwang-Ting (Tim) Cheng
105
Voted
SIGSOFT
2010
ACM
14 years 7 months ago
RT-simex: retro-analysis of execution traces
This presentation demonstrates the early results from the French ANR project RT-Simex. RT-Simex proposes a set of tools to analyze timing of parallel embedded code and trace the s...
Julien DeAntoni, Frédéric Mallet, Fr...