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» POSIX modeling in SystemC
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102
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DELTA
2004
IEEE
15 years 4 months ago
Towards Analog and Mixed-Signal SOC Design with SystemC-AMS
Systems-on-Chip (SoCs) are heterogeneous by nature as they may integrate digital, analog, RF hardware as well as software components or non electrical parts such as sensors or act...
Alain Vachoux, Christoph Grimm, Karsten Einwich
88
Voted
DATE
2006
IEEE
101views Hardware» more  DATE 2006»
15 years 6 months ago
Design with race-free hardware semantics
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
78
Voted
SAMOS
2004
Springer
15 years 5 months ago
Synchronous Transfer Architecture (STA)
This paper presents a novel micro-architecture for high-performance and low-power DSPs. The underlying Synchronous Transfer Architecture (STA) fills the gap between SIMD-DSPs and ...
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
15 years 6 months ago
Heterogeneous behavioral hierarchy for system level designs
Enhancing productivity for designing complex embedded systems requires system level design methodology and language support for capturing complex design in high level models. For ...
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Ber...
CODES
2000
IEEE
15 years 4 months ago
Towards a new standard for system-level design
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
Stan Y. Liao