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» POSIX modeling in SystemC
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DATE
2003
IEEE
135views Hardware» more  DATE 2003»
15 years 10 months ago
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovan...
SBACPAD
2003
IEEE
137views Hardware» more  SBACPAD 2003»
15 years 10 months ago
Exploring Memory Hierarchy with ArchC
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
CODES
2002
IEEE
15 years 10 months ago
Worst-case performance analysis of parallel, communicating software processes
In this paper we present a method to perform static timing analysis of SystemC models, that describe parallel, communicating software processes.The paper combines a worstcase exec...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...
ENTCS
2006
127views more  ENTCS 2006»
15 years 5 months ago
Capability-Passing Processes
Capability passing processes model global applications in a way that decouples the global agreement aspects of protocols from the details of how the communications are actually ma...
Tom Chothia, Dominic Duggan
FDL
2004
IEEE
15 years 8 months ago
A Functional Programming Framework of Heterogeneous Model of Computation for System Design
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shu...