181 search results - page 15 / 37 » PRISM: An Integrated Architecture for Scalable Shared Memory |
113
click to vote
ERSA
2010
14 years 7 months ago
2010
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
DSN
2004
IEEE
15 years 1 months ago
2004
IEEE
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
133
click to vote
HPCA
2012
IEEE
13 years 5 months ago
2012
IEEE
Phase change memory (PCM) recently has emerged as a promising technology to meet the fast growing demand for large capacity memory in modern computer systems. In particular, multi...
114
click to vote
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
HPCA
1997
IEEE
15 years 1 months ago
1997
IEEE
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...