181 search results - page 21 / 37 » PRISM: An Integrated Architecture for Scalable Shared Memory |
RTSS
2000
IEEE
15 years 2 months ago
2000
IEEE
The maturity of schedulabilty analysis techniquesfor fired-prioritypreemptive scheduling has enabled the consideration of timing issues at design time using a specification of the...
CORR
2011
Springer
14 years 1 months ago
2011
Springer
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated p...
IEEEPACT
2007
IEEE
15 years 4 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
GRID
2004
Springer
15 years 3 months ago
2004
Springer
— Time sharing between all the users of a Grid is a major issue in cluster and Grid integration. Classical Grid architecture involves a higher level scheduler which submits non o...
CF
2009
ACM
15 years 4 months ago
2009
ACM
The exponential growth of databases that contains biological information (such as protein and DNA data) demands great efforts to improve the performance of computational platforms...