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» PRISM: An Integrated Architecture for Scalable Shared Memory
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CODES
2006
IEEE
15 years 3 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
96
Voted
ICCV
2003
IEEE
15 years 3 months ago
Reinforcement Learning for Combining Relevance Feedback Techniques
Relevance feedback (RF) is an interactive process which refines the retrievals by utilizing user’s feedback history. Most researchers strive to develop new RF techniques and ign...
Peng-Yeng Yin, Bir Bhanu, Kuang-Cheng Chang, Anlei...
76
Voted
ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
15 years 4 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
ICPP
1995
IEEE
15 years 1 months ago
Hiding Miss Latencies with Multithreading on the Data Diffusion Machine
— Large parallel computers require techniques to tolerate the potentially large latencies of accessing remote data. Multithreadingis onesuch technique. We extend previous studies...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
IPPS
1995
IEEE
15 years 1 months ago
Operating system support for concurrent remote task creation
This paper describes improvements to the Mach microkernel’s support for efficient application startup across multiple nodes in a cluster or massively parallel processor. Signifi...
Dejan S. Milojicic, David L. Black, Steven J. Sear...