181 search results - page 29 / 37 » PRISM: An Integrated Architecture for Scalable Shared Memory |
74
Voted
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
SIGARCH
2008
14 years 9 months ago
2008
As CMP platforms are widely adopted, more and more cores are integrated on to the die. To reduce the off-chip memory access, the last level cache is usually organized as a distribu...
85
Voted
DAC
2008
ACM
15 years 10 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
86
Voted
ACNS
2006
Springer
15 years 3 months ago
2006
Springer
Dependable digital signing service requires both high fault-tolerance and high intrusion-tolerance. While providing high fault-tolerance, existing approaches do not satisfy the hig...
PPL
2008
14 years 9 months ago
2008
In this work we present an initial performance evaluation of Intel's latest, secondgeneration quad-core processor, Nehalem, and provide a comparison to first-generation AMD a...