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» Packet Reordering in Network Processors
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85
Voted
AINA
2008
IEEE
15 years 4 months ago
Multi-Character Processor Array for Pattern Matching in Network Intrusion Detection System
—Network Intrusion Detection System (NIDS) is a system developed for identifying attacks by using a set of rules. NIDS is an efficient way to provide the security protection for ...
Yeim-Kuan Chang, Ming-Li Tsai, Yu-Ru Chung
59
Voted
COMSWARE
2007
IEEE
15 years 4 months ago
Impact of Network Dynamics on Tardiness of Data in Sensor Networks
- Impact of random delays and losses in sensor networks manifests in the form of tardiness of data used for processing at the sink nodes. The age of data used by the end applicatio...
Tarun Banka, Anura P. Jayasumana
DAC
2005
ACM
15 years 10 months ago
Low power network processor design using clock gating
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
Jia Yu, Jun Yang 0002, Laxmi N. Bhuyan, Yan Luo
ANCS
2006
ACM
15 years 3 months ago
Sequence-preserving adaptive load balancers
Load balancing in packet-switched networks is a task of ever-growing importance. Network traffic properties, such as the Zipf-like flow length distribution and bursty transmissio...
Weiguang Shi, Lukas Kencl
NOCS
2007
IEEE
15 years 3 months ago
Implementation and Evaluation of a Dynamically Routed Processor Operand Network
— Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets...
Paul Gratz, Karthikeyan Sankaralingam, Heather Han...