214 search results - page 26 / 43 » Packet Reordering in Network Processors |
98
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ICPP
1998
IEEE
15 years 1 months ago
1998
IEEE
In this paper, we study fault-tolerantmulticastingin multistage interconnection networks (MINs) for constructing large-scale multicomputers. In addition to point-to-point routing ...
CCGRID
2001
IEEE
15 years 1 months ago
2001
IEEE
Active networks allow computations to be performed innetwork at routers as messages pass through them. Active networks offer unique opportunities to optimize networkcentric applic...
116
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FPL
2006
Springer
15 years 1 months ago
2006
Springer
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
OSDI
2004
ACM
15 years 10 months ago
2004
ACM
We present icTCP, an "information and control" TCP implementation that exposes key pieces of internal TCP state and allows certain TCP variables to be set in a safe fash...
FPL
2006
Springer
15 years 1 months ago
2006
Springer
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...