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VLSID
2005
IEEE
97views VLSI» more  VLSID 2005»
15 years 3 months ago
Q-PREZ: QBF Evaluation Using Partition, Resolution and Elimination with ZBDDs
In recent years, there has been an increasing interest in Quantified Boolean Formula (QBF) evaluation, since several VLSI CAD problems can be formulated efficiently as QBF insta...
Kameshwar Chandrasekar, Michael S. Hsiao
DAC
1999
ACM
15 years 1 months ago
Using Lower Bounds During Dynamic BDD Minimization
Ordered Binary Decision Diagrams BDDs are a data structure for representation and manipulation of Boolean functions often applied in VLSI CAD. The choice of the variable orderin...
Rolf Drechsler, Wolfgang Günther
ICCD
2001
IEEE
176views Hardware» more  ICCD 2001»
15 years 6 months ago
BDD Variable Ordering by Scatter Search
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...
William N. N. Hung, Xiaoyu Song
DSD
2007
IEEE
87views Hardware» more  DSD 2007»
15 years 4 months ago
On the Construction of Small Fully Testable Circuits with Low Depth
During synthesis of circuits for Boolean functions area, delay and testability are optimization goals that often contradict each other. Multi-level circuits are often quite small ...
Görschwin Fey, Anna Bernasconi, Valentina Cir...
TACAS
2001
Springer
92views Algorithms» more  TACAS 2001»
15 years 2 months ago
Language Containment Checking with Nondeterministic BDDs
Abstract. Checking for language containment between nondeterministic ω-automata is a central task in automata-based hierarchical verification. We present a symbolic procedure for...
Bernd Finkbeiner