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ASPDAC
1995
ACM
77views Hardware» more  ASPDAC 1995»
15 years 6 months ago
A scheduling algorithm for synthesis of bus-partitioned architectures
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi T...
IPPS
2010
IEEE
15 years 1 months ago
Oblivious algorithms for multicores and network of processors
We address the design of algorithms for multicores that are oblivious to machine parameters. We propose HM, a multicore model consisting of a parallel shared-memory machine with hi...
Rezaul Alam Chowdhury, Francesco Silvestri, Brando...
PDP
2006
IEEE
15 years 9 months ago
An Experimental Validation of the PRO Model for Parallel and Distributed Computation
— The Parallel Resource-Optimal (PRO) computation model was introduced by Gebremedhin et al. [2002] as a framework for the design and analysis of efficient parallel algorithms. ...
Mohamed Essaïdi, Jens Gustedt
109
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IPPS
2000
IEEE
15 years 7 months ago
Repartitioning Unstructured Adaptive Meshes
We present a new parallel repartitioning algorithm for adaptive finite-element meshes that significantly reduces the amount of data that needs to move between processors in orde...
José G. Castaños, John E. Savage
PDP
2008
IEEE
15 years 9 months ago
Scheduling of QR Factorization Algorithms on SMP and Multi-Core Architectures
This paper examines the scalable parallel implementation of QR factorization of a general matrix, targeting SMP and multi-core architectures. Two implementations of algorithms-by-...
Gregorio Quintana-Ortí, Enrique S. Quintana...