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ICASSP
2011
IEEE
14 years 7 months ago
A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder
In this paper, based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder wit...
Jia-Wei Liang, He-Yuan Lin, Gwo Giun Lee
HPCA
2012
IEEE
13 years 11 months ago
Balancing DRAM locality and parallelism in shared memory CMP systems
Modern memory systems rely on spatial locality to provide high bandwidth while minimizing memory device power and cost. The trend of increasing the number of cores that share memo...
Min Kyu Jeong, Doe Hyun Yoon, Dam Sunwoo, Mike Sul...
PDP
2006
IEEE
15 years 9 months ago
A Distributed Query Structure to Explore Random Mappings in Parallel
We explore the possibilities to organize a query data structure in the main memories or hard disks of a cluster computer. The query data structure serves to improve the performanc...
Jan Heichler, Jorg Keller
FCCM
2005
IEEE
124views VLSI» more  FCCM 2005»
15 years 9 months ago
Parallel Hardware Implementation of Cellular Learning Automata Based Evolutionary Computing (CLA-EC) on FPGA
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
Arash Hariri, Reza Rastegar, Morteza Saheb Zamani,...
EUROPAR
2009
Springer
15 years 8 months ago
Towards Metaprogramming for Parallel Systems on a Chip
We demonstrate that the performance of commodity parallel systems significantly depends on low-level details, such as storage layout and iteration space mapping, which motivates t...
Lee W. Howes, Anton Lokhmotov, Alastair F. Donalds...