6437 search results - page 413 / 1288 » Parallel Algorithms for Arrangements |
161
click to vote
ICPR
2004
IEEE
16 years 5 months ago
2004
IEEE
Pattern recognition and computer vision tasks are computationally intensive, repetitive, and often exceed the capabilities of the CPU, leaving little time for higher level tasks. ...
151
click to vote
SASP
2009
IEEE
15 years 11 months ago
2009
IEEE
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
122
click to vote
EUROPAR
2009
Springer
15 years 11 months ago
2009
Springer
The availability of large-scale computing platforms comprised of tens of thousands of multicore processors motivates the need for the next generation of highly scalable sparse line...
133
click to vote
IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
The research interest in sensor nets is still growing because they simplify data acquisition in many applications. If hardware resources are very sparse, routing algorithms cannot...
103
click to vote
FPGA
2003
ACM
15 years 10 months ago
2003
ACM
Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we ...