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CODES
2010
IEEE
14 years 8 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
JRTIP
2008
118views more  JRTIP 2008»
14 years 10 months ago
Custom parallel caching schemes for hardware-accelerated image compression
Abstract In an effort to achieve lower bandwidth requirements, video compression algorithms have become increasingly complex. Consequently, the deployment of these algorithms on Fi...
Su-Shin Ang, George A. Constantinides, Wayne Luk, ...
ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
15 years 3 months ago
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation
— The fully parallel LDPC decoding architecture can achieve high decoding throughput, but it suffers from large hardware complexity caused by a large set of processing units and ...
In-Cheol Park, Se-Hyeon Kang
GECCO
2004
Springer
160views Optimization» more  GECCO 2004»
15 years 3 months ago
Finding Effective Software Metrics to Classify Maintainability Using a Parallel Genetic Algorithm
The ability to predict the quality of a software object can be viewed as a classification problem, where software metrics are the features and expert quality rankings the class lab...
Rodrigo A. Vivanco, Nicolino J. Pizzi
GECCO
2005
Springer
134views Optimization» more  GECCO 2005»
15 years 3 months ago
Predicting mining activity with parallel genetic algorithms
We explore several different techniques in our quest to improve the overall model performance of a genetic algorithm calibrated probabilistic cellular automata. We use the Kappa ...
Sam Talaie, Ryan E. Leigh, Sushil J. Louis, Gary L...