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IESS
2007
Springer
162views Hardware» more  IESS 2007»
15 years 6 months ago
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs
Abstract This paper presents an embedded system design toolchain for automatic generation of parallel code runnable on symmetric multiprocessor systems from an initial sequential s...
Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, G...
SPAA
2005
ACM
15 years 5 months ago
Randomization does not reduce the average delay in parallel packet switches
Switching cells in parallel is a common approach to build switches with very high external line rate and a large number of ports. A prime example is the parallel packet switch (in...
Hagit Attiya, David Hay
FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
15 years 3 months ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith
PPOPP
2011
ACM
14 years 2 months ago
Compact data structure and scalable algorithms for the sparse grid technique
The sparse grid discretization technique enables a compressed representation of higher-dimensional functions. In its original form, it relies heavily on recursion and complex data...
Alin Florindor Murarasu, Josef Weidendorfer, Gerri...
CORR
2010
Springer
112views Education» more  CORR 2010»
14 years 9 months ago
Optimal Distributed Online Prediction using Mini-Batches
Online prediction methods are typically presented as serial algorithms running on a single processor. However, in the age of web-scale prediction problems, it is increasingly comm...
Ofer Dekel, Ran Gilad-Bachrach, Ohad Shamir, Lin X...