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HPCN
1999
Springer
15 years 6 months ago
A Parallel Implementation of the Block Preconditioned GCR Method
Abstract. The parallel implementation of GCR is addressed, with particular focus on communication costs associated with orthogonalization processes. This consideration brings up qu...
C. Vuik, Jason Frank
HPCA
2009
IEEE
16 years 2 months ago
Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
ICDCS
2009
IEEE
15 years 11 months ago
The Impact of Communication Models on Routing-Algorithm Convergence
Autonomous routing algorithms, such as BGP, are intended to reach a globally consistent set of routes after nodes iteratively and independently collect, process, and share network...
Aaron D. Jaggard, Vijay Ramachandran, Rebecca N. W...
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
15 years 7 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
HOTI
2005
IEEE
15 years 7 months ago
Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication
Memory systems for conventional large-scale computers provide only limited bytes/s of data bandwidth when compared to their flop/s of instruction execution rate. The resulting bo...
Robert J. Drost, Craig Forrest, Bruce Guenin, Ron ...