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ASAP
2008
IEEE
119views Hardware» more  ASAP 2008»
15 years 8 months ago
An FPGA architecture for CABAC decoding in manycore systems
Arithmetic coding is an efficient entropy compression method that achieves results close to the entropy limit and it is used in modern standards such as JPEG-2000 and H.264. Arith...
Roberto R. Osorio, Javier D. Bruguera
ANCS
2006
ACM
15 years 10 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo
APPT
2009
Springer
16 years 1 months ago
A Fast Scheme to Investigate Thermal-Aware Scheduling Policy for Multicore Processors
Abstract. With more cores integrated into one single chip, the overall power consumption from the multiple concurrent running programs increases dramatically in a CMP processor whi...
Liqiang He, Cha Narisu
COLCOM
2007
IEEE
16 years 22 days ago
Kademlia for data storage and retrieval in enterprise networks
— Centralized organization of current enterprise networks doesn’t represent an ideal solution in terms of information security and reliability. Denial of service, packet filter...
Natalya Fedotova, Stefano Fanti, Luca Veltri
HAPTICS
2007
IEEE
16 years 22 days ago
Human Performance in a Knob-Turning Task
Knob turning is a common task that should influence the design of human-machine interfaces such as prosthetic arms, teleoperated robots, and virtual environments. This study exam...
Netta Gurari, Allison M. Okamura