3584 search results - page 702 / 717 » Parallel Computing of Thermoelasticity Problems |
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
75
Voted
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
HPCA
2004
IEEE
15 years 10 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
HPCA
2003
IEEE
15 years 10 months ago
2003
IEEE
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...